(1) Field of the Invention
The invention relates to processes for the manufacture of semiconductor devices and more particularly to processes related to the analysis of impurities in silicon wafers.
(2) Description of Prior Art
The manufacture of very large scale integrated (VLSI) circuits involves hundreds of discrete processing steps beginning with the introduction of blank silicon wafers. The quality an purity of the starting silicon wafers is, without question, one of the most crucial factors in the performance of the semiconductor devices in the finished product. The current high density, high performance, low cost technology makes widespread use of the metal oxide silicon field effect transistor which depends upon a thin silicon oxide gate insulator. This gate oxide is grown by thermal oxidation of the surface of the silicon wafer.
Trace metallic Impurities within the wafer surface and in the chemicals used to grow layers thereon or to clean or treat oxide layers thereon have a deleterious effect on the performance of the gate oxide as well as on it's reliability. Because of these serious consequences great strides have been taken to provide the highest quality control of the starting material. Additionally, the processing of defective wafers can result in enormous yield losses.
Fortunately, great strides have been by taken by silicon wafer manufacturers to provide reliable substrates. Analytical methods have been found widespread use to properly qualify and characterize silicon wafers. Among these are atomic absorption spectroscopy, emission spectroscopy, inductively coupled mass spectrometry, and X-ray fluorescence.
A well known sampling method which has been developed and cited by Maeda, et. al., U.S. Pat. No. 4,990,459 is a vapor phase decomposition (VPD) technique. The VPD technique extracts and concentrates trace levels of metallic contaminants from the surface of a test wafer by decomposing a layer of silicon oxide with HF vapors. The residue, which contains the non volatile impurities is then collected in a small droplet of a suitable acid such as hydrofluoric acid. The droplet is systematically moved across the entire wafer surface so that all the residue is collected. The recovered droplet is then analyzed by the well known analytical methods mentioned hereinbefore.
Referring to FIG. 1 there is shown a cross section of a prior art sampling technique using VPD, as cited by Maeda et.al. a test wafer 10 having a silicon oxide layer 11 on its surface is placed into a closed chamber 12. A pool of aqueous HF 13, located elsewhere within the chamber 12, emits HF vapors 14 which fill the chamber and, in time, decompose the silicon oxide layer 11. The wafer is then removed and any residue on the polished side of the wafer 10 is collected by a manual method involving the passage of a collection droplet across the wafer surface by tilting the wafer, thereby rolling the drop over the entire surface.
In an earlier patent by the present inventors, Petvai, et.al. U.S. Pat. No. 5,569,328, the sample collection technique was greatly improved by providing automating the movement of the collection droplet. An inert carrier is used to contain the droplet as well as increase the contact area of the droplet. Not only is the reliability and reproducibility of sample collection improved by this apparatus, but the cycle time and the risk of external contamination are greatly reduced. The wafer is mounted on a table having a programmable rotation. The apparatus provides a robotic arm which transports the wafers from a cassette to a VPD chamber where HF vapors decompose the silicon oxide layer. The wafer then passes to the droplet collection station where the sample is collected by a droplet on a pre-loaded sample carrier delivered from a carousel. The entire apparatus operates in an internal class 1 environment.
The long time required to decompose the silicon oxide layer by the use of vapor etching technique illustrated by FIG. 1 affects the cycle time and thereby limits the production capability of the apparatus. This is especially true when thicker, thermally grown, silicon oxide layers are examined. The flash mist method provided by the current invention greatly increases the decomposition rate of the oxide layer.
In order to place the embodiments of this invention into a proper perspective, a brief review of the prominent details of the acid droplet fluid scanner apparatus cited by Petvai, et.al. is now given utilizing FIG. 2 which corresponds to FIG. 4 of that patent.
Wafers, loaded in a cassette, are introduced into the system 41 which encloses a class 1 particle environment, through a small systems interface 42 and placed on cassette stand 44. A pickup fork 46, under robotic control 50 transports a test wafer (not shown) from the cassette stand 44, first to a bar code reader 51, where the wafer is identified, and thence to a VPD etching chamber 52 wherein the silicon oxide layer is decomposed. The robotic arm 50 then delivers the wafer to a rotatable table 54 which is fitted with a vacuum chuck. A translating arm mechanism 58 retrieves a droplet carrier from a carrousel (not shown) and positions the carrier on the fork 57 near the edge of the mounted wafer. A precision liquid handler 61 on the robotic arm 50 retrieves a pre-measured volume of liquid and delivers it to the droplet carrier. The wafer table 54 is rotated in a prescribed sequence as the translational arm 58 moves the captured droplet toward the center of the wafer, thereby traversing the entire wafer surface and collecting any residue for the analysis. At the completion of this cycle, the liquid handler 61 retrieves the droplet from the droplet carrier and deposits it back either into a cup in the carousel 60 of an auto sampler, where it is retained for analysis, or onto an inert membrane fitted onto a carrier fixture designed for any of the analytical equipment of choice. The wafer is delivered to the receiving cassette 62. The computer system 47 with accompanying keyboard 48 and mouse 49 are also shown.